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  • ​​eSPI Target IP Core​

    IP Core

    ​​eSPI Target IP Core​

    ​​Lattice eSPI Target IP Core is compliant with the Intel eSPI specifications & has its own virtual wire channel in the user interface.​
    ​​eSPI Target IP Core​
  • Modular Peripheral Sideband Tunneling Interface (M-PESTI) IP core

    IP Core

    Modular Peripheral Sideband Tunneling Interface (M-PESTI) IP core

    ​​The Lattice M-PESTI IP core provides early peripheral presence detection and attribute collection before system boot up.​
    Modular Peripheral Sideband Tunneling Interface (M-PESTI) IP core
  • Lattice Sentry 4.0 SCM and HPM CPLD Reference Design

    Reference Design

    Lattice Sentry 4.0 SCM and HPM CPLD Reference Design

    ​​This is a CPLD design template for the Secure Control Module (SCM) and Host Platform Module (HPM) for the Sentry 4.0 Server solution platform.​
    Lattice Sentry 4.0 SCM and HPM CPLD Reference Design
  • MPESTI Initiator Reference Design

    Reference Design

    MPESTI Initiator Reference Design

    MPESTI Initiator Reference Design provides the solution template which is compliant with the MPESTI Base Specification.
    MPESTI Initiator Reference Design
  • DC-SCM LVDS Tunneling Protocol and Interface (LTPI) IP Core

    IP Core

    DC-SCM LVDS Tunneling Protocol and Interface (LTPI) IP Core

    LTPI IP Core is an Open Computer Project Data Center – Secure Control Module Standards compatible solution which is introduced in the DC-SCM 2.0 Specification.
    DC-SCM LVDS Tunneling Protocol and Interface (LTPI) IP Core
  • LVDS Tunneling Protocol and Interface Reference Design

    Reference Design

    LVDS Tunneling Protocol and Interface Reference Design

    The DC-SCM 2.0 LTPI Reference Design provides multiple solution compliant with DC-SCM 2.0 with a standardized DC-SCI and aggregating multiple data channels.
    LVDS Tunneling Protocol and Interface Reference Design
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