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  • 10G Ethernet IP Core

    IP Core

    10G Ethernet IP Core

    The Lattice 10G Ethernet IP Core supports the ability to transmit and receive data between a host processor and an Ethernet network.
    Avant-G, Avant-X, CertusPro-NX 
    Ethernet, PCS, XGMII, AXI4, Ethernet Bundle, SDR, Avionics 
    10G Ethernet IP Core
  • 2.5G Ethernet MAC+PHY IP Core

    IP Core

    2.5G Ethernet MAC+PHY IP Core

    The Lattice 2.5G Ethernet MAC + PHY IP core implements the Media Access Controller (MAC) and state machine functions for the Physical Coding Sub-layer (PCS) described in the IEEE 802.3 (1000BASE-X) specification.
    MachXO5-NX, CertusPro-NX 
    Lattice Radiant, APB, Ethernet, PCS, IEEE 802.3, Ethernet Bundle 
  • SLVS-EC Receiver IP Core

    IP Core

    SLVS-EC Receiver IP Core

    The SLVS-EC RX IP provides the FPGA an interface to receive serial data from CMOS Image Sensors and offers a solution to convert the incoming serial data to a parallel pixel data format.
    CertusPro-NX 
    SLVS-EC, APB, AHB, AMBA, PMA, PCS, MPCS 
    SLVS-EC Receiver IP Core
  • Avant MPPHY Module

    Avant MPPHY Module

    The MPPHY Module supports the most common high-speed SERDES protocols used for inter-chip connectivity.
    Avant-G, Avant-X 
    Lattice Avant, Lattice Radiant, PCS, PMA, SERDES 
    Avant MPPHY Module
  • PHY Interface for PCI Express - PIPE

    IP Core

    PHY Interface for PCI Express - PIPE

    A standard interface between a PHY device and the Media Access (MAC) layer for PCI Express (PCIe) applications
    LatticeECP3, LatticeECP2/M 
    PCIe, PCS, SERDES, Guidance Systems, Smart munitions 
    PHY Interface for PCI Express - PIPE
  • 10Gb Ethernet PCS IP Core

    IP Core

    10Gb Ethernet PCS IP Core

    The archived IP has been merged with the 10G Ethernet (MAC + PHY) IP Core.
    CertusPro-NX 
    Ethernet, APB, PCS 
    10Gb Ethernet PCS IP Core
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