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  • ​​I/O Aggregation Over USB with CrossLinkU-NX Reference Design​

    Reference Design

    ​​I/O Aggregation Over USB with CrossLinkU-NX Reference Design​

    USB to IO Bridging Reference Design Create plug-and-play peripheral expansion on USB-enabled FPGA & signal protocol conversion from USB to I2C, SPI, & GPIO.
    ​​I/O Aggregation Over USB with CrossLinkU-NX Reference Design​
  • CrossLinkU-NX Evaluation Board

    Board

    CrossLinkU-NX Evaluation Board

    CrossLinkU-NX Evaluation Board is a platform for general purpose application development using CrossLinkU-NX device, the first FPGA with hard USB2/3 (5Gbps) interface.
    CrossLinkU-NX Evaluation Board
  • USB 2.0/3.2 IP Core

    IP Core

    USB 2.0/3.2 IP Core

    Lattice USB 2.0/3.2 IP Core provides a solution to interface with a USB host and can be targeted to the Lattice CrossLink-NX FPGA Devices.
    USB 2.0/3.2 IP Core
  • Certus-NX 65K Development Board

    Board

    Certus-NX 65K Development Board

    Certus-NX 65K Development Board features the Certus NX-65 device in a 486-ball caBGA package that offers variety of features to expand the usablity with Arduino, Versa, Raspberry, PMOD, Aardvark, header and 1x PCIe(Gen2) Channel.
    Certus-NX 65K Development Board
  • MachXO5-65T Development Board

    Board

    MachXO5-65T Development Board

    The MachXO5-65T Development Board features the LFMXO5-65T device in a 484-ball caBGA package. The board offers a variety of features to expand the usability of the MachXO5-NX-65T with Arduino, Versa, Raspberry Pi, PMOD, and AARDVARK header.
    MachXO5-65T Development Board
  • CertusPro-NX PCIe Bridge Board

    Board

    CertusPro-NX PCIe Bridge Board

    The CertusPro-NX PCIe Bridge Board enables video bridge capabilities to PCIe and embedded vision type applications.
    CertusPro-NX PCIe Bridge Board
  • SFB Interface IP Core

    IP Core

    SFB Interface IP Core

    SFB allow access to AHB-L CPLD block , management CPU recovery circuit and Flash sector for read/write.
    SFB Interface IP Core
  • JTAG Embedded Programming using RPi Reference Design

    Reference Design

    JTAG Embedded Programming using RPi Reference Design

    Demo connects Raspberry Pi GPIO pins to JTAG source code in Lattice Radiant™ and Diamond™ software for embedded development and hardware testing.
  • LimeSDR Mini Development Board by Lime Microsystems

    Board

    LimeSDR Mini Development Board by Lime Microsystems

    LimeSDR Mini Dev Board is a low cost, open source and apps-enabled SDR platform that can be used to support any type of wireless communication standard.
    LimeSDR Mini Development Board by Lime Microsystems
  • Joint Test Action Group (JTAG) Bridge IP Core

    IP Core

    Joint Test Action Group (JTAG) Bridge IP Core

    The Lattice Semiconductor JTAG Bridge IP provides an efficient solution for debugging on-board issues by allowing you to access memory and peripheral registers directly using this IP, without involving the processor.
  • LPTM21L Evaluation Board

    Board

    LPTM21L Evaluation Board

    For evaluation and development with Platform Manager 2 devices.
    LPTM21L Evaluation Board
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