The Lattice Semiconductor 10Gb Ethernet Attachment Unit Interface (XAUI) provides a solution for bridging between XAUI and 10-Gigabit Media Independent Interface (XGMII) devices. The IP core implements the 10Gb Ethernet Extended Sublayer (XGXS) capabilities in soft logic that together with PCS and serializer/deserializer (SERDES) functions implemented in the FPGA provides a complete XAUI-to-XGMII solution.
Latest Resource Utilization details are available in the IP Core User Guide.