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ID: 2018
Case Type: faq
Category: Architecture
Related To: Generic DDR
Family: LatticeECP3

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LatticeECP3 datasheet shows that LVDS (Low Voltage Differential Signal) output buffer can run at 612MHz, can I achieve that speed on my DDR (Double Data Rate) interface?

The 612MHz in the Lattice ECP3 datasheet is valid for LVDS (Low Voltage Differential Signal) buffer speed only.

For a DDR (Double Data Rate) interface speed, please check the LatticeECP3 External Switching Characteristic section of our LatticeECP3 datasheet to find the type of DDR interface that is being implemented in the design as the maximum speed for a DDR interface is limited by the speed of the ECLK (Edge clock) and the clocking structure used in the design.

Link to ECP3 datasheet -

http://www.latticesemi.com/view_document?document_id=50370