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  • Topic
    ID
    Family
    Category
    Related To
  • Diamond / ECP5: What happens to Byte Order when Endian is switched on memories with different port…
    4068
    LatticeECP5
    Implementation
    IPexpress
  • iCE40 LP/HX: Are the NC (NOT CONNECTED) pins on iCE40 devices internally connected?
    4028
    iCE40
    Customer Board Design
    Schematic Review
  • Avant-G/Avant-X: What is the max peak-to-peak voltage of differential refclk for SERDES?
    7337
    Avant-AT-X
    Serdes/PCS
  • All Devices: Is there an available 3d model for any Lattice FPGA Devices?
    7335
    All FPGA
    Other
  • Diamond/Radiant: How to disable GSR in Lattice Diamond/Radiant?
    7331
    All Devices
    Fabric
  • Lattice Radiant v2023.2: How to modify I2C slave address or 96-feabits using Pseudo mode?
    7336
    CertusPro-NX
    Programming and Configuration
  • ispLever Classic: Is ispLever classic supported on Linux or Mac OS X platforms?
    4030
    Other CPLD
    Installation
    Linux
  • How to view Ball Grid Array (BGA) breakout and routing examples provided by Lattice for FPGA…
    4035
    MachXO2
    Inquiries
    Appnote/Technote
  • How to calculate CPHASE, FPHASE, ICP_CURRENT, LPF_RESISTOR values for PLL configuration in MachXO2?
    4041
    MachXO2
    Architecture
    PLL/DLL/Clock Routing
  • [ECP3]: Does the Tri-Rate Serial Digital Interface (SDI) IP support 2048x1080_24p?
    4044
    LatticeECP3
    Lattice IP/Reference Design
    Tri-Rate SDI PHY
  • ECP5/ECP5-5G: What should be the status of the sysCONFIG pins to perform SPI Flash background…
    4047
    LatticeECP5
    Architecture
    Configuration/Programming
  • iCE40 : What is the default status of I/O pins before the configuration of an iCE40 device?
    4045
    iCE40
    Architecture
    IO
  • Is the lifetime of TAG memory in LatticeXP2 the same as On-Chip Flash memory?
    4046
    LatticeXP2
    Architecture
    Memory EBR/Distributed
  • Mico System Builder: error occurs while debugging the C code: "Malformed response to offset query,…
    4419
    LatticeECP3
    Debugging
    Reveal
  • Could the IO design be changed between two bitstreams when performing TransFR?
    7340
    MACHXO3
    Programming and Configuration
  • Radiant & Diamond Non-GUI Flow: Why does the GUI flow of Radiant generate some messages that do not…
    7322
    Avant-AT-E
    Radiant
  • ModelSim / QuestaSim: simulation error using a node-locked license in a remote desktop connection
    7327
    ispMACH 4000
    License Error
  • Propel: Why does the RISC-V debug session hang during exception handling?
    7326
    All FPGA
    Propel (RISC-V)
  • Propel Builder: How to export AMBA bus out from Lattice Propel Builder system with a valid…
    7608
    All FPGA
  • Lattice Avant PCIe: Map ERROR 52351076 - Instance…
    7641
    Avant-AT-G
    PCIe
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