Description:
Input pins that are "controlled" by I2C remain in high impedance (high-Z) state as they are not bidirectional pins and they are always inputs. Output pins that are controlled by I2C, will follow the behavior as listed in Table "I2C Control Registers" of the ispPAC-POWR1014/A Datasheet (FPGA-DS-02089). Basically, all outputs controlled by I2C will be logic low except OUT3 which will be logic high for SMBA compatibility. The PINS window settings in the PAC software are not valid for I2C controlled pins.