The Lattice Semiconductor AHB-Lite to APB Bridge Module provides an interface between the high-speed AHB-Lite and the low power APB. In many applications, the AHB-Lite system runs on a higher frequency clock with the APB system. This module has an optional clock crossing bridge, which can be enabled during IP configuration.
The design is implemented in Verilog HDL. The IP can be configured and generated using the Lattice Propel Builder software.