[Blog] Real-Time Hyperloop Control With FPGAs
Posted 07/25/2025 by Lattice Semiconductor
The evolution of modern transportation is accelerating the need for control systems that are not only fast and accurate, but also highly adaptable and efficient. Lattice FPGAs empower engineers across industries with low power, programmable logic that enables real-time data processing, intelligent system coordination, and rapid hardware adaptability. One standout application is High-speed Hyperloop transit, a futuristic transportation concept.
Swissloop, a student-led initiative supported by ETH Zürich, is at the forefront of Hyperloop development. Focused on advancing the practical potential of this new mode of transportation, the team has participated in both the original SpaceX Hyperloop competition and its successor, the European Hyperloop Week (EHW), where their engineering achievements have been widely recognized. In 2023, Swissloop secured 5 awards at EHW in Edinburgh. In 2024, they demonstrated vacuum compatibility and passenger transport for the first time, earning 3 additional awards and placing third overall.
At the core of these prototypes is the control architecture — and at the heart of that architecture are Lattice MachXO3™ FPGAs.
Swissloop prototype at the EHW 2024 in Zurich
Swissloop’s 2024 prototype "Sarah Springman" introduced a custom linear switched reluctance motor (LSRM) and an electromagnetic suspension (EMS). The pod, weighing 426 kilograms, achieved acceleration of 1.14g. This propulsion system is powered by 3 custom-built universal power converters — the same converters also power the EMS, which enables levitation and lateral stabilization.
Coordinating these systems requires real-time control loops that operate with millisecond precision. The team developed a new General Purpose Control Board (GPCB) based on the Lattice MachXO3 FPGA, featuring a 512 Megabit pseudostatic RAM. The FPGA manages a wide range of embedded logic functions: pod and booster state machines, high-speed signal acquisition, and the control loops for propulsion, levitation, and the booster system. The booster uses a 3-phase linear synchronous motor to accelerate the pod at the start of its run. It spans 4 track elements and is powered by 6 additional universal power converters. All control logic across booster, levitation, and propulsion systems is implemented using Lattice FPGAs — enabling the low-latency, deterministic behavior required for safe operation at high speeds in vacuum conditions.
Transition from booster beam to propulsion beam
Precision matters in high-speed environments. Swissloop’s pod uses binary light gate sensors to track its position on the rail. These sensors are read and processed in real time by Lattice MachXO3 FPGAs, enabling sub-millimeter accuracy in position tracking. The levitation system features eight electromagnets, each requiring its own current control loop to maintain the pod’s vertical height and lateral alignment within the track. A single MachXO3 FPGA handles all control loops and sensor data acquisition simultaneously — maximizing hardware efficiency without compromising response time.
Additional MachXO3 FPGAs are also used in the booster segment, where they manage both current control and positioning of the pod within the booster zone. The ability to parallelize control tasks and integrate them in a low power, programmable architecture is key to Swissloop’s system stability and scalability.
2024 version of General Purpose Control Board with the Lattice MachXO3 9400C
Swissloop’s modular system design allows the team to build, test, and improve each subsystem independently. All propulsion, levitation, and booster systems rely on universal power converters that are controlled by FPGA-based logic boards. This separation of logic improves reliability and shortens troubleshooting time, which is critical for a team developing an entirely new prototype each season.
Currently, the Swissloop team is developing their next-generation FPGA control board, again built on the Lattice MachXO3 family. The new design will integrate current control directly onto each power converter, reducing latency and further improving system-level efficiency.
FPGA Control Board featuring the Lattice MachXO3 9400 C
At this year’s European Hyperloop Week in Groningen, Netherlands, the Swissloop team once again demonstrated its commitment to advancing Hyperloop technology. Their performance reflected not only the ingenuity and technical skill of the student engineers, but also the impact of enabling technologies that help turn ambitious concepts into award-winning systems.
Innovators like Swissloop are turning to Lattice FPGA solutions for their low power profiles, deterministic performance, and architectural flexibility. With their power efficiency, design flexibility, and precise control capabilities, Lattice solutions enable rapid prototyping, reliable system management, and scalable performance—empowering the next generation of engineers to bring bold ideas to life.
For more information, visit the MachXO3 FPGA product page, and to learn more about how Lattice low power FPGA technology can help with your next breakthrough application development, reach out to speak with the team at Lattice.