[Blog] Enabling Hardware-Based Trust with TPM and FPGAs

Building and maintaining connected digital ecosystems that account for today’s evolving cyber threat landscape requires a degree of hardware-based trust, as software-only security approaches are no longer sufficient to protect complex, distributed systems

Luckily, today’s developers can reference a foundational example of hardware-based security that has existed for decades: the Trusted Platform Module (TPM). With over four billion TPM units deployed globally across a wide range of use cases, this design is a popular standard for secure system development and operation.

In our latest Security Seminar, experts from Lattice, SEALSQ, and TrustiPhi discussed the rapid evolution of the modern cyber threat landscape, the relevance of TPMs as a hardware-based security standard, and the key role Field Programmable Gate Arrays (FPGAs) can play as demand for reliable TPM functionality rises.

What is a Trusted Platform Module?
A Trusted Platform Module is a chip/microcontroller designed specifically to secure hardware by generating, storing, and using cryptographic keys.

Initially developed for PCs in the late 1990s, this hardware component has since expanded into datacenters, Internet of Things (IoT) devices, telecommunications equipment, and even military and defense systems. Beyond their cryptographic key capabilities, TPMs are often used to enable secure boot and attestation, data encryption and decryption, and system integrity measurement – all critical security functions for systems that unite disparate devices and components.

TPMs are also commonly used as hardware root of trust (HRoT) components in system architecture. By providing cryptographic integrity at the hardware level, TPMs can anchor trust for the entire system stack and provide tamper-proof storage. This ultimately helps ensure that all devices in a distributed system are running securely and as intended, providing a crucial foundation for any interconnected network.

Overall, TPMs are a popular standard because they can consistently support secure identification, secure communication, and data integrity. But it’s important to clarify a common misconception: regardless of their various strengths, TPMs are not standalone security solutions. They require additional enablement.

The Power of TPM + FPGA Co-Design
TPMs have many strengths, but due to their relatively static nature, they are not fit to handle the contemporary security landscape on their own. They rely on broader system design, firmware components, platform software, and regular updates to stay up to date with evolving threats and regulations.

That’s why developers are turning to more dynamic FPGA-based TPM co-designs to meet today's shifting security needs. TPMs and FPGAs are each competent and powerful in their own right. But when combined, they’re capable of delivering an entirely new level of protection.

With their reprogrammability and parallel processing capacity, FPGAs are perfect companions to and extenders of TPM functionality, offering a dynamic and flexible set of supportive capabilities to enhance security for the modern landscape.

FPGAs enable:

• Real-time monitoring of system components to quickly detect and react to attacks, breaches, injection attempts, or anomalous behavior.
• Verifiable secure boot and RoT for measurement through verifying and measuring the boot chain first and ensuring that the TPM only receives accurate system measurements.
• Platform firmware resiliency (PFR) through the application of cyber resilience policies.
• Post-quantum cryptography (PQC)-ready design and post-deployment reconfiguration capabilities to keep pace with changing cryptographic algorithm standards.
• System-level orchestration and integration by enabling sensor hubs, AI accelerators, and network processors without sacrificing consistent security or system integrity.

Ultimately, TPM and FPGAs are complementary solutions, not redundant components. They offer developers a layered defense model in which FPGAs observe, enforce, and measure, while the TPM attests, protects, and stores.

Keeping Pace with Evolving Cyber Threats
This layered defense model is critical for protecting against contemporary cyber threats and attacks. The cyber landscape changes quickly, with hackers and bad actors adjusting their tactics faster than many organizations can match.

Major changes that are expected to impact system security in the coming months and years include:

• PQC compliance. As quantum computing develops and PQC standards become commonplace, developers must ensure that their systems can implement evolving cryptographic algorithms. Based on guidance from the National Institute of Standards and Technology (NIST) and the National Security Agency (NSA), systems need to be PQC-capable by 2027, have full implementation by 2030, and non-PQC algorithms must be retired by 2035.
• Standards and regulations. As governing bodies strive to keep pace with evolving threats, new standards will roll out – and systems must be capable of adapting to meet their requirements. These include CNSA 2.0, CNSSP-15, the Trusted Computing Group (TCG) TPM specifications, Cyber Resilience Act, and more. Each of these standards will carry its own specifications, instructions, and consequences for noncompliance.
• Artificial intelligence and machine learning. Whether it be ensuring data integrity for AI training purposes, regulating personal agents and digital identities, or ensuring data provenance and trustworthiness, evolving AI and ML solutions will continue to impact system security.

A system enabled by the combined capabilities of TPM and FPGAs is well-suited to adapt to these shifts in the threat and regulatory landscapes. With the TPM providing cryptographic keys and RoT security, the FPGA can deliver improved system communication and real-time response – in addition to further layers of protection and programmability throughout the system’s life cycle – creating a more flexible but still secure system.

The Evolution of TPM-Based Security
For years, TPMs have proven to be capable and trustworthy RoT components for system design. But to keep pace with the real-time and adaptable needs of a changing security landscape, they must be paired with more dynamic and flexible FPGA components. By leveraging both TPMs and FPGAs, developers can create systems that operate efficiently and achieve both short- and long-term cyber resiliency.

To learn more about the combined use of TPMs and FPGAs, watch the full Security Seminar recording. Explore how Lattice FPGA security solutions can meet your hardware-based system security needs, and contact our team today to start building a more secure future.