SLVS-EC RX IP

“SLVS-EC RX IP” for a high-speed interface standard for image sensors.

Related Products

Our SLVS-EC RX IP enables system design with optimum efficiency by minimizing the amount of registers and LUTs used and allocating resources to the main functions.

- SLVS-EC Specification: v2.0 compliant

* Ver. 3.1 is also under development. Please feel free to contact us for further information.

Features

  • Baud Grade: 1, 2, 3 (max. 5Gbps)
  • Pixel Data: 8, 10, 12, 14, 16bit
  • Number of Lanes: 1, 2, 4, 8
  • CRC: Supported (On/Off switchable)
  • ECC: Optional

Block-Diagram

SLVS-EC-RX-IP Block Diagram

Reference system using SLVS-EC RX IP

Ordering Information

We also sell SLVS-EC RX IP and develop FPGA/ASIC and boards that incorporate it. Please feel free to contact us.

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