​​Mutex IP Core​

​​Resolves Shared Resource Competition in Multi-Processor Environments​

The Lattice Semiconductor Mutex IP is used in multi-processor environment to solve the competition of the shared resources between different processors. The Mutex provides a configurable number of registers for processors to claim they gain exclusive access to particular resources, like shared memory space or shared peripherals.

Resource Utilization details are available in the IP Core User Guide.

Features
  • AXI-Lite interface and AHB-Lite interface
  • Configurable number of mutex
  • Configurable interface numbers
  • Configurable CPUID width to clarify the owner of mutex
  • Selectable hardware identification support

Block Diagram

Ordering Information

The Mutex IP is provided at no additional cost with the Lattice Propel design environment. The IP can be fully evaluated in hardware without requiring an IP license string

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
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Mutex IP Module User Guide - Lattice Propel Builder
FPGA-IPUG-02285 1.0 6/26/2025 PDF 412.5 KB

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