MIPI DSI/CSI-2 to Parallel Bridge Reference Design

Bridging Industrial Displays to Mobile Application Processors

Most mobile processors use industry standard interfaces such as MIPI DSI for interface connectivity. Larger consumer and industrial displays sometimes have a parallel interface that cannot be directly connected to a mobile application processor without a bridge. Many new applications want to leverage mobile innovations while utilizing larger displays with specific requirements and capabilities. Lattice CrossLink-NX Family FPGAs are the perfect devices for these new applications.

Using the MIPI DSI/CSI-2 to Parallel interface bridge reference design for the CrossLink-NX Families, you can quickly create a bridging solution for a processor with a MIPI DSI interface to a display with an RGB interface or a camera with a MIPI CSI-2 interface to a processor with Parallel interface. This reference design is free and is provided to demonstrate the use of Lattice’s popular CrossLink-NX for wearable, tablet, human machine interfacing, medical equipment, and many other applications.

Features

  • Compliant with MIPI D-PHY v1.2, MIPI DSI v1.2, and MIPI CSI-2 v1.2 specifications
  • Supports MIPI D-PHY interfacing from 80 Mb/s up to 2.5 Gb/s
  • Supports 1, 2, or 4 data lanes and one clock lane
  • Supports continuous and non-continuous MIPI D-PHY clock
  • Supports common MIPI DSI compatible video formats (RGB888, RGB666)
  • Supports common MIPI CSI-2 compatible video formats (RGB888, RAW8, RAW10, RAW12)
  • Supports MIPI DSI Video Mode operation of Non-Burst Mode with Sync Pulses and Non-Burst Mode with Sync

Jump to

Block Diagram

CrossLink and CrossLink-NX Modular IP Support Table

Documentation

Technical Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
MIPI to Parallel with CrossLink-NX - Documentation
FPGA-RD-02213 1.0 3/2/2021 PDF 1.5 MB
MIPI to Parallel with CrossLink-NX - Source Code
FPGA-RD-02213 1.0 3/2/2021 ZIP 12.9 MB

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