Tablets

Driving Exceptional User Experiences In next Generation Tablets

Related Products

Tablets architecture continue to evolve, adding more sensors, improving quality of existing sensors and displays to drive better user experience with crisp imagery and perfect details. In addition device manufacturers are racing toward lower power consumption and slim size devices. Lattice FPGA provide the bridging and distributed processing capabilities to elevate some of the challenges designer are facing on the road to innovative form factors with ultra slim designs.

Lattice’s solutions running on optimized low power FPGAs provide:

  • Flexible and low latency sensor data aggregation, bridging, data buffering and processing from a wide variety of sensors
  • MIPI CSI and DSI image sensor and display bridging
  • Enable new form factors by reducing improving board to board connectivity

Jump to

Block Diagram

Tablets

Example Use Cases

Sensor Fusion and I/O Expansion

  • Interface to a wide variety of sensors to create rich user experience
  • Flexible preprocessing including arbitration, time stamping, and filtering
  • Create programmable sensor fusion algorithms

Image Sensor Bridging

  • Connect wide a variety of image sensors to processors
  • MIPI PHY supports up to 2.5 Gbps/lane, up to four lanes
  • Flexible host interfacing including CSI, SPI, and PCIe
  • Flexible processing for video data muxing and Stitching

Display Bridging

  • Bridge between displays and processors when display interface is not supported native by the processor
  • Use the FPGA internal memory resources for compression and buffering
  • Expand the number of processor display interfaces

Reference Designs

Human Face Identification

Reference Design

Human Face Identification

Uses a Convolutional Neural Network in the ECP5 FPGA to detect a human face, and match to known registered faces. Can be adapted to work with any other object.
Human Face Identification
人感検出

Reference Design

人感検出

Uses Lattice sensAI IP to continuously search for the presence of a human and reports results. Can be adapted to detect any other object.
人感検出

Demos

Human Face Identification

Demo

Human Face Identification

Register and identify faces without retraining, eliminating the need for uploading images and lengthy retraining using a GPU.
Human Face Identification
人感検出

Demo

人感検出

Uses an artificial intelligence (AI) algorithm to detect human presence with either the powerful ECP5 FPGA, or small, low-power iCE40 UltraPlus FPGA.
人感検出
人数カウント

Demo

人数カウント

人数カウントのデモはラティスのECP5 FPGAと畳み込みニューラルネットワーク(CNN)アクセラレーションエンジンを活用
人数カウント

IP Cores

CNN Plus Accelerator IP

IP Core

CNN Plus Accelerator IP

Implement Ultra-Low Power AI solutions with CNNs. Configure up to 16-bit widths. Works with Lattice Neural Network Compiler software tool.
CNN Plus Accelerator IP
CSI-2 / DSI D-PHY トランスミッタ

IP Core

CSI-2 / DSI D-PHY レシーバ

IP Core

CSI-2 / DSI D-PHY レシーバ

MIPI D-PHY はカメラやディスプレイの標準的なインタフェースです。この IP を使用すると FPGA に D-PHY レシーバを実装できます。
CSI-2 / DSI D-PHY レシーバ

Development Kits & Boards

CrossLink-NX 評価ボード

Board

CrossLink-NX 評価ボード

CrossLink-NX 評価ボードは 40K ロジックセルのCrossLink-NXを搭載: ほとんどの I/O に簡単にアクセス可能、FPGA の PCIe 5G SERDES: FPGA メザニンカード (FMC)、Raspberry Pi、MIPI CSI-2、D-PHY、拡張用汎用ヘッダ
CrossLink-NX 評価ボード
CrossLink: LIF-MD6000 – マスターリンクボード

Board

CrossLink: LIF-MD6000 – マスターリンクボード

ドーターボード用のコネクタを備えたマスターCrossLinkプラットホーム。I/Oリンクボードを含む。
CrossLink: LIF-MD6000 – マスターリンクボード
CrossLink: LIF-MD6000 I/O リンクボード

Board

CrossLink: LIF-MD6000 I/O リンクボード

カスタム開発およびに評価用のCrossLink I/Oにアクセスするため、LIF-MD6000マスターリンクボードに接続
CrossLink: LIF-MD6000 I/O リンクボード

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Quality & Reliability

Reference Material to Help Answer Your Questions

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