Platform Manager

Centralize control functions with scalable power management

Revolutionary power management architecture – Easily manage up to 36 rails using distributed power sense and centralized controls. Slash time to market and debug time through fault logging.

Change your algorithm, not your board – Instead of reworking your PCB, simply reprogram your Platform Manager device to quickly handle design changes.

Don’t throttle the silicon – Platform Manager’s precision voltage scaling and VID features enable easy control of complex, power-hungry ASICs and SoCs.

Features

  • Centralized power-up/down sequencing control and power supply sensing
  • Lower chip power dissipation using voltage scaling / VID
  • Precision voltage control (<10 mV accuracy) with closed-loop trimming
  • Capture voltage faults (primary cause) within 100 µs with 0.2% (typ) accuracy and store in on-chip flash
  • Quickly modify monitoring thresholds, sequence or timing… even when the system is in the field

Jump to

Family Table

Platform Manager Device Selector Guide

Parameters LPTM10-1247 LPTM10-12107
Analog Inputs - Single-Ended 5 0
Analog Inputs - Differential 7 12
Total Analog Inputs 12 12
Dedicated Open Drain Outputs 12 12
Dedicated Digital Inputs 4 4
Digital I/O 31 91
Total Digital I/O 47 107
Margin and Trim 6 8
MOSFET Driver Outputs 4 4
CPLD MacroCells 48 48
FPGA - LUT-s 640 640
Package 128-pin TQFP 208-ball ftBGA

Example Solutions

Reduce power and system operating cost by dynamically controlling power dissipation device by device.

  • Dynamic Power Dissipation Control through VID reduces the power consumption of ASICs and processors by more than 30%
  • Improve performance and add functionality to your board without increasing power requirements by controlling voltage using a simple code.
  • Eliminate the need for microcontroller and software to configure DC-to-DC converters.

Enhance board reliability and decrease debug time using robust fault logging.

  • Non Volatile Memory with Time Stamping lets you quickly pinpoint the primary fault even in complex systems with large numbers of supplies.
  • Log all faults as soon as they occur and capture the status of all power supplies. And reliably store the image directly in a flash memory.
  • Capture the primary cause of the board failure – make it possible to easily link flash corruption to a power failure

Reduce field maintenance costs through in-system programmable power management.

  • Reliably change power sequencing algorithms in the field while the system is running, using in-system programmability.
  • Back-up golden Image ensures fail-safe update of power management algorithms.
  • Eliminate the need to send out technicians for field upgrades.

Accurately adjust for brown-outs by quickly switching to back-up power in less than 16µs

  • Maintain power to small cells during brown-out
  • Ride through brown-out periods by automatically switching to a back up through fast, accurate voltage monitoring.

Reduce system cost by implementing reliable hot-swap using lowest cost MOSFETs

  • Implement reliable, high-power hot-swap controller without using expensive big MOSFETs
  • Reduce the total number of MOSFETs required – and use smaller low-cost, conventional MOSFETs

Save development time and effort by reusing a single-chip, scalable power management solution.

  • Enables scalability as the system bandwidth and power requirements grow from 12 to 36 rails in one chip.
  • Simplify power management design process by eliminating the need for partitioning the sequencing algorithms
  • Fine tune supply sequencing enabling reliable board power-up

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Application Notes

Learn how to get the most from our line-up of FPGAs / development boards

Software

Complete Design Flows, High Ease of Use

Development Kits & Boards

Our development boards & kits help streamline your design process

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Platform Manager Data Sheet
FPGA-DS-02077 1.4 2/14/2020
High-side Current Sensing Techniques for Power Manager Devices
AN6049 01.1 4/17/2008
Extending the VMON Input Range of Power/Platform Management Devices
AN6041 2.4 3/1/2016
Fail-Safe Sequencing During Field Upgrades Source Files
DT6088 1.2 6/6/2012
Fail-Safe Sequencing During Field Upgrades with Platform Manager
AN6088 01.2 6/6/2012
Monitoring and Controlling Negative Power Supplies with Power Manager Devices
AN6051 02.1 4/17/2008
Optimizing the Accuracy of ispPAC Power Manager Timers
AN6076 01.0 12/12/2007
Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters
AN6074 1.2 4/7/2015
ispPAC-POWR1220AT8 I2C Hardware Verification Utility
AN6067 01.0 11/21/2005
Implementing Power Supply Sequencers with Power/Platform Management Devices and PAC-Designer LogiBuilder
AN6042 01.2 10/7/2011
Using the HVOUT Simulator Utility to Estimate FET Ramp Times
AN6070 01.0 11/21/2005
Using Power MOSFETs with Power/Platform Management Devices
AN6048 1.3 8/29/2017
Using the Platform Manager Successfully
TN1223 01.1 8/17/2012
Using PAC-Designer's Power Manager Waveform Editor
AN6054 01.0 11/23/2005
Powering Up and Programming the ProcessorPM ispPAC-POWR605
AN6082 01.1 4/21/2011
Programming the ispPAC-POWR1220AT8 in a JTAG Chain Using the ATDI Pin
AN6068 01.1 2/28/2011
Powering Up and Programming the ispPAC-POWR1220AT8
AN6073 01.1 4/21/2011
Powering Up and Programming the ispPAC-POWR607
AN6078 01.1 4/21/2011
Programmable Comparator Options for ispPAC-POWR1220AT8
AN6069 01.0 11/21/2005
Scalable Centralized Power Management Source Files
DT6089 1.2 6/6/2012
Scalable Centralized Power Management with Field Upgrade Support
AN6089 01.2 6/6/2012
Stable Operation of DC-DC Converters with Power Manager Closed Loop Trim
AN6077 1.1 10/8/2014
Powering Up and Programming the ispPAC-POWR1014/A
AN6075 01.1 4/11/2011
Controlling and Monitoring Power-One Bricks and SIPs with Lattice Power Manager Devices
AN6056 01.1 4/17/2008
Creating Platform Manager Designs with PAC-Designer and Lattice Diamond Software
TN1259 01.0 3/4/2013
TITLE NUMBER VERSION DATE FORMAT SIZE
Platform Manager Data Sheet
FPGA-DS-02077 1.4 2/14/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
High-side Current Sensing Techniques for Power Manager Devices
AN6049 01.1 4/17/2008
Extending the VMON Input Range of Power/Platform Management Devices
AN6041 2.4 3/1/2016
Fail-Safe Sequencing During Field Upgrades Source Files
DT6088 1.2 6/6/2012
Fail-Safe Sequencing During Field Upgrades with Platform Manager
AN6088 01.2 6/6/2012
Monitoring and Controlling Negative Power Supplies with Power Manager Devices
AN6051 02.1 4/17/2008
Optimizing the Accuracy of ispPAC Power Manager Timers
AN6076 01.0 12/12/2007
Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters
AN6074 1.2 4/7/2015
ispPAC-POWR1220AT8 I2C Hardware Verification Utility
AN6067 01.0 11/21/2005
Implementing Power Supply Sequencers with Power/Platform Management Devices and PAC-Designer LogiBuilder
AN6042 01.2 10/7/2011
Using the HVOUT Simulator Utility to Estimate FET Ramp Times
AN6070 01.0 11/21/2005
Using Power MOSFETs with Power/Platform Management Devices
AN6048 1.3 8/29/2017
Using the Platform Manager Successfully
TN1223 01.1 8/17/2012
Using PAC-Designer's Power Manager Waveform Editor
AN6054 01.0 11/23/2005
Powering Up and Programming the ProcessorPM ispPAC-POWR605
AN6082 01.1 4/21/2011
Programming the ispPAC-POWR1220AT8 in a JTAG Chain Using the ATDI Pin
AN6068 01.1 2/28/2011
Powering Up and Programming the ispPAC-POWR1220AT8
AN6073 01.1 4/21/2011
Powering Up and Programming the ispPAC-POWR607
AN6078 01.1 4/21/2011
Programmable Comparator Options for ispPAC-POWR1220AT8
AN6069 01.0 11/21/2005
Scalable Centralized Power Management Source Files
DT6089 1.2 6/6/2012
Scalable Centralized Power Management with Field Upgrade Support
AN6089 01.2 6/6/2012
Stable Operation of DC-DC Converters with Power Manager Closed Loop Trim
AN6077 1.1 10/8/2014
Powering Up and Programming the ispPAC-POWR1014/A
AN6075 01.1 4/11/2011
Controlling and Monitoring Power-One Bricks and SIPs with Lattice Power Manager Devices
AN6056 01.1 4/17/2008
Creating Platform Manager Designs with PAC-Designer and Lattice Diamond Software
TN1259 01.0 3/4/2013
TITLE NUMBER VERSION DATE FORMAT SIZE
Platform Manager Development Kit Quick Start Guide
QS009 1 3/27/2013
Platform Management Utility Functions IP Core User's Guide
IPUG94 01.1 1/24/2011
Power Manager II Hercules Development Kit User's Guide
EB57 01.0 12/22/2010
Platform Manager Development Kit User's Guide
EB58 01.2 12/7/2010
TITLE NUMBER VERSION DATE FORMAT SIZE
Serial Peripheral Interface (SPI) - Documentation
RD1075 1.1 12/23/2011
SPI GPIO Expander - Documentation
RD1073 1.1 12/23/2010
Temperature Monitor Using Platform Manager Documentation
RD1080 1.0 9/28/2010
SPI GPIO Expander - Source Code
RD1073 1.1 12/23/2010
Serial Peripheral Interface (SPI) - Source Code
RD1075 1.1 12/23/2011
UART (Universal Asynchronous Receiver/Transmitter) - Documentation
RD1011 1.6 6/14/2011
Temperature Monitor Using Platform Manager Source Files
RD1080 1.0 9/28/2010
UART (Universal Asynchronous Receiver/Transmitter) - Source Code
RD1011 1.7 1/1/2015
I2C (Inter-Integrated Circuit) Slave/Peripheral - Documentation
RD1054 1.6 12/1/2014
GPIO Expander, Documentation
RD1065 1.3 4/12/2011
Error Logging Using Platform Manager Documentation
RD1077 1.0 9/28/2010
GPIO Expander, Source Code
RD1065 1.3 4/12/2011
I2C Slave to SPI Master Bridge - Documentation
RD1094 1.1 12/23/2011
Error Logging Using Platform Manager Source Files
RD1077 1.0 9/28/2010
I2C (Inter-Integrated Circuit) Master Controller - Source Code
RD1005 5.9 1/10/2015
I2C (Inter-Integrated Circuit) Master Controller - Documentation
RD1005 5.8 3/6/2014
I2C (Inter-Integrated Circuit) Slave/Peripheral - Source Code
RD1054 1.6 12/12/2014
I2C Slave to SPI Master Bridge - Source Code
RD1094 1.1 12/23/2011
BSCAN2 - Multiple Scan Port Linker - Documentation
RD1002 4.8 1/30/2017
Closed Loop Power Supply Trimming Source Code
RD1078 1.0 12/6/2010
BSCAN1 - Multiple Boundary Scan Port Addressable Buffer - Source Code
RD1001 7.3 4/18/2011
BSCAN2 - Multiple Boundary Scan Port Linker - Source Code
RD1002 4.6 3/13/2014
Closed Loop Power Supply Trimming Documentation
RD1078 1.0 12/6/2010
BSCAN1 - Multiple Boundary Scan Port Addressable Buffer - Documentation
RD1001 7.3 4/18/2011
Long Delay Timers Using Platform Manager Documentation
RD1079 1.1 9/28/2010
Long Delay Timers Using Platform Manager Source Files
RD1079 1.0 9/28/2010
PWM Fan Controller - Source Code
RD1060 1.7 1/16/2015
Platform Manager Dev Kit Power Supply Voltage Control (VID) Demo Source Files
1.0 12/6/2010
Power Management Bus Reference Design Documentation
RD1100 1.1 12/23/2011
Power Management Bus Reference Design - Source Code
RD1100 1.1 12/23/2011
Platform Manager Dev Kit Initial Demo Source Files
1.1 1/26/2011
PWM Fan Controller
RD1060 1.6 9/10/2014
OrCAD Capture (.dsn) format schematics
1 9/28/2010
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO 300 mm Fab Transition Circuit Observations Mitigation
PB1377 2.0 6/12/2017
TITLE NUMBER VERSION DATE FORMAT SIZE
ACN03D-11 Withdrawal of ACN03C-11
Material Set
ANC03D-11 1 4/1/2011
PCN 03A-15 LPTM10 New MASK SET Yield and Parametric Analysis
PCN03A-15 1.0 11/23/2015
PCN 03A-15 Alternate Qualified Foundry / Mask Set and Alternate Qualified Material Sets for Platform Manager Products
Foundry, Mask Set, Material Set
PCN03A-15 2.0 11/23/2015
TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
6.8 7/16/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
Platform Manager Product Brochure
I0208 1.0 4/10/2012
Platform Manager Product Brochure (Chinese)
I0208C 1.0 6/4/2012
Product Selector Guide
I0211 26.0 7/9/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice Platform Manager Product Family Qualification Summary
C 11/21/2015
FTG208_LPTM10
Rev F 7/7/2020
FTG208_LPTM10
Rev E 7/7/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
Fast and Efficient Board and Power Management Solutions (Chinese Language)
1.0 4/1/2011
Reset Generation for TI DSP Processor (Chinese Language)
1.0 6/28/2010
Transforming Circuit Board Design (Chinese Language)
1.0 9/26/2011
Reset Generation for TI DSP Processor (Traditional Chinese Language)
1.0 6/28/2010
Saving Power Using Closed Loop Voltage Scaling Control - White Paper (Chinese Language Version)
1.0 5/31/2012
Transforming Board Management (Chinese Language)
1.0 10/1/2010
Reset Generation for TI DSP Processor
1.0 3/1/2010
Reset Generation for TI DSP Processor (Japanese Language)
1.0 3/1/2010
Transforming Circuit Board Design
1.0 9/26/2011
TITLE NUMBER VERSION DATE FORMAT SIZE
Platform Manager 208 ftBGA BSDL Files
1.1 2/27/2014
LPTM10_1247_MO640
1.01 10/8/2014
LPTM10_12107_XO640
1.01 10/8/2014
Platform Manager 128 TQFP BSDL Files
1.1 2/26/2013
TITLE NUMBER VERSION DATE FORMAT SIZE
[IBIS] ispPAC-POWR1220AT8
0.2 3/2/2012
TITLE NUMBER VERSION DATE FORMAT SIZE
Selecting Power and Platform Manager Devices Excel Spreadsheet Tool
1.1 3/19/2012


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