MachXO3 – Control and Bridging FPGA

Futureproof your control PLD and bridging designs

Simplified Control PLD Design and Debug – With multiple I/O banks, a wide range of signaling standards, per-pin programmability and the highest I/O-to-Logic ratio in the industry - Don’t trade off features and functionality. Integrate more capabilities into MachXO3 device family with up to 9400 LUTs and 384 I/O.

Secure and Reliable – Protect your designs from malicious attacks using password protection, and mitigate soft errors through state of the art Soft Error Detection and Soft Error Correction features.

Extended Temperature Flexibility – Realize your next automotive or rugged environmental design with automotive AEC-Q100 qualified XO3LF devices.

Features

  • Up to 9400 LUTs with up to 384 I/O pins
  • Instant-on 1 ms boot-up with background upgrade, Hitless I/O reconfigure and dual-boot error recovery
  • Available with 3.3/2.5 V core or low power 1.2 V core – including additional options on 9400 LUT devices
  • MachXO3LF includes programmable Flash and User Flash Memory (UFM)
  • Available in amazingly small (2.50 x 2.50 mm, 0.4 mm pitch) WLCSP packages and BGA packages with 0.50 mm and 0.80 mm pitch
Automotive

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Video

MachXO3-10KExpand Image

Control PLD for Embedded System Design

Family Table

MachXO3 Device Selection Guide
PARAMETERS MachXO3L-640/
MachXO3LF-640
MachXO3L-1300/
MachXO3LF-1300
MachXO3L-2100/
MachXO3LF-2100
MachXO3L-4300/
MachXO3LF-4300
MachXO3L-6900/
MachXO3LF-6900
MachXO3L-9400/
MachXO3LF-9400
Density LUTs 640 1300 2100 4300 6900 9400
Distributed RAM (kbits) 5 10 16 34 54 73
EBR SRAM (kbits) 64 64 74 92 240 432
UFM (kbits, MachXO3LF only) 64 64 80 96 256 448
VCC = 2.5 V/3.3 V - Yes
Yes
Yes
Yes
Yes
VCC = 1.2 V Yes
Yes
Yes
Yes
Yes
Yes
Temperature Grades1 C / I C / I / A2 C / I / A2 C / I / A2 C / I C / I
PLL 1 1 1 2 2 2
I2C 2 2 2 2 2 2
SPI 1 1 1 1 1 1
Timer/Counter 1 1 1 1 1 1
Oscillator 1 1 1 1 1 1
MIPI D-PHY Support Yes Yes Yes Yes Yes Yes
Multi Time Programmable NVCM MachXO3L MachXO3L MachXO3L MachXO3L MachXO3L MachXO3L
Programmable Flash MachXO3LF MachXO3LF MachXO3LF MachXO3LF MachXO3LF MachXO3LF

1. C = Commercial, I = Industrial, A = Automotive
2. Automotive grade devices available in MachXO3LF only

0.4 mm Spacing I/O Count
  640 1300 2100 4300 6900 9400
36-ball WLCSP (2.5 x 2.5 mm)1
28



49-ball WLCSP (3.2 x 3.2 mm)1

38


81-ball WLCSP (3.8 x 3.8 mm)1


63

0.5 mm Spacing I/O Count
  640 1300 2100 4300 6900 9400
121-ball csfBGA (6 x 6 mm)1 100 100 100 100

256-ball csfBGA (9 x 9 mm)1
206 206 206 206 206
324-ball csfBGA (10 x 10 mm)1

2684 2684 281
0.8 mm Spacing I/O Count
  640 1300 2100 4300 6900 9400
256-ball caBGA (14 x 14 mm)
2064 2064 2064 2062 2063
324-ball caBGA (15 x 15 mm)

2794 2794 2792
400-ball caBGA (17 x 17 mm)


3352 3352 3353
484-ball caBGA (19 x 19 mm)




3843

1. Package is only available for E=1.2 V devices
2. Package is only available for C=2.5 V/3.3 V devices
3. Package is available for both E=1.2 V and C=2.5/3.3 V devices
4. Package is available in automotive grade (MachXO3LF only)

Example Solutions

Control PLD

  • Non-volatile PLD (640 to 9400 LUTs & 28 to 384 I/O) provides widest application coverage in servers, communication boxes and industrial controllers.
  • Reduce cost and BOM by integrating hardware management functions, such as power thermal management and control PLD, into MachXO3 and L-ASC10.
  • Add features and fix bugs in-system without interrupting the system operation through Hitless I/O.
  • Complete board debug faster through on-chip debug using Reveal.

Motor Control Interface with MachXO3

  • Flexibility to interface with variety of motors used in Industrial, Automotive and other embedded systems
  • IGBT Protection and SPI interface allows real-time feedback to the MCU
  • Flexibility to support different communication standards at low power and fast response
  • Small footprint to accommodate space constrained applications

Battery Management Control using MachXO3

  • MachXO3 provides controller for the battery management for mobile and portable embedded systems
  • Intelligent cell balancing for charge equalization for each battery cell.
  • Control charge/ discharge process and receive real-time battery information like State of Charge (SOC) and State of Health (SOH)

Microprocessor Interface Expansion

  • Save cost by adding GPIO to low-cost microcontrollers
  • Add additional SPI and I2C interfaces to system control processors
  • Perform voltage level translation with ease
  • Simplify system management with PLD implementation of system status registers

CSI-2 Image Sensor Interfacing

  • Supports CSI-2 High Speed Differential Signaling
    • Both Rx and Tx interfaces
  • From 1-4 lanes of CSI-2 at up to 900 Mbps
  • Can be implemented in a 49 wlcsp (3.2 x 3.2 mm)
  • RAW, YUV or RGB supported

DSI LCD Display Interfacing

  • Supports DSI transmit signaling
    • HS (High Speed) Mode transmit
    • LP (Low Power) Mode transmit and receive
  • Can be implemented in a 49 wlcsp (3.2 x 3.2 mm)
  • Supports DSI formats RGB, YCbCr and User Defined
  • Input bus can also be DSI to enable LCD screen replacement

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Application Notes

Learn how to get the most from our line-up of FPGAs / development boards

Software

Complete Design Flows, High Ease of Use

Development Kits & Boards

Our development boards & kits help streamline your design process

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

To subscribe, or modify your subscription, to Document Notifications please login to your Lattice account

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO3 sysCLOCK PLL Design and Usage Guide
TN1282 1.3 6/30/2016 PDF 4.5 MB
MachXO3 Programming and Configuration Usage Guide
TN1279 2.2 9/7/2017 PDF 5.4 MB
MachXO3 SED Usage Guide
TN1292 1.3 3/17/2017 PDF 1.1 MB
Implementing High-Speed Interfaces with MachXO3 Devices
TN1281 1.1 3/1/2015 PDF 4.5 MB
Using Hardened Control Functions in MachXO3 Devices
TN1293 1.5 9/7/2017 PDF 3.4 MB
Using Hardened Control Functions in MachXO3 Devices Reference Guide
TN1294 1.7 12/19/2016 PDF 6 MB
Using Password Security with MachXO3 Devices
TN1313 1.0 1/1/0001 PDF 559.5 KB
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015 PDF 2.4 MB
Wafer-Level Chip-Scale Package Guide
TN1242 1.0 7/13/2011 PDF 127.2 KB
Power Decoupling and Bypass Filtering for Programmable Devices
TN1068 1.0 5/1/2004 PDF 31.4 KB
Power and Thermal Estimation and Management for MachXO3 Devices
TN1289 1.4 10/22/2017 PDF 1.2 MB
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
FPGA-AN-02011 1.2 10/11/2019 PDF 2.1 MB
MachXO3 324-Pin csfBGA Package Migration File
1.2 3/1/2015 CSV 28.7 KB
MachXO3 400-caBGA Package Migration File
1.3 7/27/2016 CSV 35.3 KB
MachXO3-6900 Pinout
1.2 9/22/2014 CSV 28.1 KB
MachXO3-4300 Pinout 400 Ball
1.1 9/22/2014 CSV 20.7 KB
MachXO3 324-Pin caBGA Package Migration File
1.2 3/1/2015 CSV 29 KB
MachXO3 256-Pin csfBGA Package Migration File
1.3 7/27/2016 CSV 37.7 KB
MachXO3-2100 Pinout
1.2 9/22/2014 CSV 16 KB
MachXO3-1300 Pinout
1.1 9/22/2014 CSV 7 KB
MachXO3-2100 Pinout 324 Ball
1.1 9/22/2014 CSV 17.9 KB
MachXO3-4300 Pinout
1.2 9/22/2014 CSV 23.2 KB
MachXO3-1300 Pinout 256 Ball
1.1 9/22/2014 CSV 14 KB
MachXO3-9400 Pinout
1.0 6/6/2016 CSV 28.4 KB
MachXO3-640 Pinout
1.1 9/22/2014 CSV 6.5 KB
MachXO3 256-Pin caBGA Package Migration File
1.3 7/27/2016 CSV 37.7 KB
MachXO3 121-Pin csfBGA Package Migration File
1.2 3/1/2015 CSV 14.8 KB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019 PDF 1.7 MB
Using TraceID
FPGA-TN-02084 2.0 6/24/2020 PDF 815 KB
Package Diagrams
FPGA-DS-02053 5.8 6/24/2020 PDF 20.2 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 4.1 5/20/2019 PDF 4.6 MB
Thermal Management
FPGA-TN-02044 3.6 6/29/2020 PDF 1.6 MB
MachXO3 sysIO Usage Guide
FPGA-TN-02056 1.7 3/30/2020 PDF 1.4 MB
Memory Usage Guide for MachXO3 Devices
FPGA-TN-02060 1.2 7/24/2020 PDF 4.3 MB
MachXO3 Hardware Checklist
FPGA-TN-02061 1.3 7/24/2020 PDF 682.2 KB
MachXO3 Family Data Sheet
FPGA-DS-02032 2.6 9/16/2020 PDF 3.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO3 Family Data Sheet
FPGA-DS-02032 2.6 9/16/2020 PDF 3.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO3 sysCLOCK PLL Design and Usage Guide
TN1282 1.3 6/30/2016 PDF 4.5 MB
MachXO3 Programming and Configuration Usage Guide
TN1279 2.2 9/7/2017 PDF 5.4 MB
MachXO3 SED Usage Guide
TN1292 1.3 3/17/2017 PDF 1.1 MB
Implementing High-Speed Interfaces with MachXO3 Devices
TN1281 1.1 3/1/2015 PDF 4.5 MB
Using Hardened Control Functions in MachXO3 Devices
TN1293 1.5 9/7/2017 PDF 3.4 MB
Using Hardened Control Functions in MachXO3 Devices Reference Guide
TN1294 1.7 12/19/2016 PDF 6 MB
Using Password Security with MachXO3 Devices
TN1313 1.0 1/1/0001 PDF 559.5 KB
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015 PDF 2.4 MB
Wafer-Level Chip-Scale Package Guide
TN1242 1.0 7/13/2011 PDF 127.2 KB
Power Decoupling and Bypass Filtering for Programmable Devices
TN1068 1.0 5/1/2004 PDF 31.4 KB
Power and Thermal Estimation and Management for MachXO3 Devices
TN1289 1.4 10/22/2017 PDF 1.2 MB
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
FPGA-AN-02011 1.2 10/11/2019 PDF 2.1 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019 PDF 1.7 MB
Using TraceID
FPGA-TN-02084 2.0 6/24/2020 PDF 815 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 4.1 5/20/2019 PDF 4.6 MB
Thermal Management
FPGA-TN-02044 3.6 6/29/2020 PDF 1.6 MB
MachXO3 sysIO Usage Guide
FPGA-TN-02056 1.7 3/30/2020 PDF 1.4 MB
Memory Usage Guide for MachXO3 Devices
FPGA-TN-02060 1.2 7/24/2020 PDF 4.3 MB
MachXO3 Hardware Checklist
FPGA-TN-02061 1.3 7/24/2020 PDF 682.2 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO3 324-Pin csfBGA Package Migration File
1.2 3/1/2015 CSV 28.7 KB
MachXO3 400-caBGA Package Migration File
1.3 7/27/2016 CSV 35.3 KB
MachXO3-6900 Pinout
1.2 9/22/2014 CSV 28.1 KB
MachXO3-4300 Pinout 400 Ball
1.1 9/22/2014 CSV 20.7 KB
MachXO3 324-Pin caBGA Package Migration File
1.2 3/1/2015 CSV 29 KB
MachXO3 256-Pin csfBGA Package Migration File
1.3 7/27/2016 CSV 37.7 KB
MachXO3-2100 Pinout
1.2 9/22/2014 CSV 16 KB
MachXO3-1300 Pinout
1.1 9/22/2014 CSV 7 KB
MachXO3-2100 Pinout 324 Ball
1.1 9/22/2014 CSV 17.9 KB
MachXO3-4300 Pinout
1.2 9/22/2014 CSV 23.2 KB
MachXO3-1300 Pinout 256 Ball
1.1 9/22/2014 CSV 14 KB
MachXO3-9400 Pinout
1.0 6/6/2016 CSV 28.4 KB
MachXO3-640 Pinout
1.1 9/22/2014 CSV 6.5 KB
MachXO3 256-Pin caBGA Package Migration File
1.3 7/27/2016 CSV 37.7 KB
MachXO3 121-Pin csfBGA Package Migration File
1.2 3/1/2015 CSV 14.8 KB
Package Diagrams
FPGA-DS-02053 5.8 6/24/2020 PDF 20.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
WISHBONE UART - Source Code
RD1042 1.6 12/1/2014 ZIP 58.5 MB
SPI WISHBONE Controller - Documentation
RD1044 1.7 3/1/2014 PDF 960 KB
SD Flash Controller Using SD Bus - Documentation
RD1088 1.4 3/12/2014 PDF 1.4 MB
SPI Slave Peripheral Using the Embedded Function Block Reference Design
RD1125 1.3 1/1/2015 ZIP 730.6 KB
SPI WISHBONE Controller - Source Code
RD1044 1.8 1/12/2015 ZIP 477.7 KB
SDR SDRAM Controller - Documentation
RD1174 1.1 3/1/2014 PDF 1.4 MB
SD Flash Controller Using SD Bus - Source Code
RD1088 1.4 3/12/2014 ZIP 5 MB
I2S Controller with WISHBONE Interface Reference Design - Source Code
RD1101 1.1 3/1/2014 ZIP 1.6 MB
HiSPi-to-Parallel Sensor Bridge
RD1120 1.3 4/1/2014 PDF 734.9 KB
I2C Slave Peripheral using Embedded Function Block - Documentation
RD1124 1.3 10/1/2014 PDF 2 MB
I2C Slave Peripheral using Embedded Function Block Reference Design
RD1124 1.3 10/1/2014 ZIP 1.4 MB
I2C Master with WISHBONE Bus Interface - Source Code
RD1046 1.8 2/1/2016 ZIP 1.4 MB
I2C Controller for Serial EEPROMs - Documentation
RD1006 2.6 3/5/2014 PDF 767.9 KB
I2C (Inter-Integrated Circuit) Master Controller - Source Code
RD1005 5.9 1/10/2015 ZIP 809.7 KB
I2C Controller for Serial EEPROMs - Source Code
RD1006 2.7 1/12/2015 ZIP 613.5 KB
I2C Master with WISHBONE Bus Interface - Documentation
RD1046 1.6 1/15/2015 PDF 1.4 MB
I2C (Inter-Integrated Circuit) Master Controller - Documentation
RD1005 5.8 3/6/2014 PDF 987.4 KB
I2S Controller with WISHBONE Interface Reference Design Documentation
RD1101 1.1 3/1/2014 PDF 2.4 MB
Parallel to MIPI DSI TX Bridge - Source Code
RD1184 1.5 1/1/2015 ZIP 2.6 MB
DSI Rx Reference Design - Source Code
RD1185 1.4 1/1/2015 ZIP 1.6 MB
Parallel to MIPI CSI-2 TX Bridge - Source Code
RD1183 1.5 1/1/2015 ZIP 1.2 MB
MIPI CSI2-to-CMOS Parallel Sensor Bridge - Documentation
RD1146 1.5 12/26/2016 PDF 4.4 MB
LatticeMico8 Core - Documentation
RD1026 2.0 2/1/2014 PDF 2 MB
LatticeMico8 Core Source Code
RD1026 2.0 2/1/2014 ZIP 1.6 MB
MIPI CSI-2-to-CMOS Parallel Sensor Bridge
RD1146 1.4 12/28/2016 ZIP 4.3 MB
LED/OLED Driver - Source code
RD1103 1.1 3/1/2014 ZIP 1.4 MB
LED/OLED Driver - Documentation
RD1103 1.1 3/1/2014 PDF 989.6 KB
DSI Rx Reference Design - Documentation
RD1185 1.3 4/1/2014 PDF 2.1 MB
PWM Fan Controller - Source Code
RD1060 1.7 1/16/2015 ZIP 2.9 MB
Parallel to MIPI DSI TX Bridge - Documentation
RD1184 1.5 1/1/2015 PDF 1.6 MB
Read and Write Usercode - Source Code
RD1041 1.3 3/1/2014 ZIP 618.2 KB
Parallel to MIPI CSI-2 TX Bridge - Documentation
RD1183 1.5 1/1/2015 PDF 1.3 MB
Read and Write Usercode - Documentation
RD1041 1.4 9/17/2014 PDF 831.5 KB
PWM Fan Controller
RD1060 1.6 9/10/2014 PDF 481.5 KB
WISHBONE UART - Documentation
RD1042 1.6 12/1/2014 PDF 1.4 MB
SPI Slave Peripheral Using the Embedded Function Block
RD1125 1.3 1/1/2015 PDF 1.2 MB
SDR SDRAM Controller - Source Code
RD1174 1.1 3/1/2014 ZIP 2.6 MB
I2C to WISHBONE Configuration Interface Bridge - Source Code
FPGA-RD-02190 1.0 5/16/2020 ZIP 1.3 MB
SPI to WISHBONE Configuration Interface Bridge - Source Code
FPGA-RD-02191 1.0 5/16/2020 ZIP 1.3 MB
SPI to WISHBONE Configuration Interface Bridge - Documentation
FPGA-RD-02191 1.0 5/16/2020 PDF 1.6 MB
I2C to WISHBONE Configuration Interface Bridge - Documentation
FPGA-RD-02190 1.0 5/16/2020 PDF 1.5 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
I2C Read-back Failure Mode on Specific Use Scenario in MachXO2 and MachXO3 Products and Work-Around Solutions Product Bulletin
PB1412 1.1 3/4/2015 PDF 179.4 KB
MachXO2/MachXO3/LPTM21 WISHBONE Flash Corruption Avoidance
PB1381 1.1 1/3/2017 PDF 88.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
PCN04A-18 fcBGA Backend Assy Transfer ATP to ATK
A 6/26/2018 PDF 286.7 KB
PCN09A-19 BOM comparison final
2.0 1/8/2020 XLSX 24.8 KB
Standard OPNs for ASEK PCN09A-19
2.0 1/8/2020 XLSX 24.4 KB
PCN09A-19 Consolidation Qual External Changes
1/9/2020 PDF 326.2 KB
PCN09A-19 ASEK Second Source Qualification for Selected Products
1/9/2020 PDF 359 KB
PCN 03A-16 MachXO2/XO3 Datasheet Change
Data Sheet
1.1 3/22/2016 PDF 367.7 KB
PCN06A-17 MachXO3 data sheet and package materials change
1.1 10/24/2017 PDF 199.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
6.9 8/13/2020 ZIP 3.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO3 Product Brief
I0238 2.0 4/19/2016 PDF 933.7 KB
MIPI Display Serial Interface Solution Product Flyer
I0241 2.0 10/22/2013 PDF 1.8 MB
Product Selector Guide
I0211 27.0 9/17/2020 PDF 8.9 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO3L/MachXO3LF Product Family Qualification Summary
J 6/4/2019 PDF 1.1 MB
BG324_XO3
Rev E 1/29/2020 PDF 33.4 KB
MG121_XO3
Rev D 8/27/2019 PDF 42.2 KB
SWG_UWG36
Rev D 9/14/2018 PDF 81.9 KB
UWG81
Rev E 6/17/2020 PDF 39.1 KB
MG256_XO3
Rev D 6/17/2020 PDF 58.8 KB
BG256 MachXO3-9400
Rev H 6/12/2020 PDF 35 KB
BG256_XO2
Rev N1 6/12/2020 PDF 43.8 KB
BG256_XO3
Rev. N1 6/12/2020 PDF 43.8 KB
BG484 MachXO3-9400
Rev A1 6/24/2020 PDF 33 KB
BG400 MachXO3-9400
Rev A1 6/24/2020 PDF 35 KB
BG400_XO3
Rev G 6/24/2020 PDF 33.8 KB
UWG49_XO2_XO3
Rev F1 6/25/2020 PDF 27.8 KB
MG324
Rev E 8/10/2020 PDF 42.3 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Distributed PLD Solution for Reduced Server Cost and Increases Flexibility
WP009 1.0 8/1/2017 PDF 708.1 KB
Multi-time Programmable ULD FPGAs
1.0 12/1/2013 PDF 163.5 KB
Leveraging MIPI D-PHY-based Peripherals in Embedded Designs
1.0 5/1/2014 PDF 567.3 KB
Revolutionary Hardware Management Solutions
WP0003 4.0 5/9/2018 PDF 1.4 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO3 Infographic
1.0 6/22/2015 PDF 5.6 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
[BSDL] LCMXO3L-2100C CABGA324
1.7 4/5/2016 BSM 53.3 KB
[BSDL] LCMXO3L-1300E CSFBGA121
1.7 4/13/2016 BSM 25.4 KB
[BSDL] LCMXO3L-2100E CSFBGA121
1.7 4/5/2016 BSM 32.9 KB
[BSDL] LCMXO3L-1300E WLCSP36
1.7 4/5/2016 BSM 18.9 KB
[BSDL] LCMXO3L-2100E CSFBGA324
1.7 4/5/2016 BSM 52.7 KB
[BSDL] LCMXO3L-2100C CABGA256
1.6 9/25/2014 BSM 42.7 KB
[BSDL] LCMXO3L-2100E WLCSP49
1.7 4/5/2016 BSM 27.1 KB
[BSDL] LCMXO3L-2100E CSFBGA256
1.7 4/5/2016 BSM 42.7 KB
[BSDL] LCMXO3L-4300C CABGA256
1.6 9/25/2014 BSM 47.3 KB
[BSDL] LCMXO3L-6900E CSFBGA324
1.7 4/5/2016 BSM 57.2 KB
[BSDL] LCMXO3L-4300C CABGA324
1.7 4/5/2016 BSM 53.3 KB
[BSDL] LCMXO3L-4300E CSFBGA121
1.3 4/5/2016 BSM 37.5 KB
[BSDL] LCMXO3L-4300C CABGA400
1.7 4/5/2016 BSM 62.4 KB
[BSDL] LCMXO3L-1300C CABGA256
1.6 9/25/2014 BSM 42.7 KB
[BSDL] LCMXO3L-4300 ECSFBGA256
1.7 4/5/2016 BSM 51.2 KB
[BSDL] LCMXO3L-1300E CSFBGA256
1.7 4/5/2016 BSM 42.7 KB
[BSDL] LCMXO3LF-6900C CABGA256
1.0 5/19/2015 BSM 51.2 KB
[BSDL] LCMXO3LF-4300C CABGA400
1.0 5/19/2015 BSM 62.4 KB
[BSDL] LCMXO3LF-2100E CSFBGA324
1.2 4/5/2016 BSM 52.7 KB
[BSDL] LCMXO3LF-6900C CABGA324
1.0 5/19/2015 BSM 57.2 KB
[BSDL] LCMXO3LF-4300E CSFBGA121
1.2 4/5/2016 BSM 37.5 KB
[BSDL] LCMXO3LF-2100E WLCSP49
1.0 5/19/2015 BSM 27.1 KB
[BSDL] LCMXO3LF-6900C CABGA400
1.0 5/19/2015 BSM 62.4 KB
[BSDL] LCMXO3LF-4300C CABGA256
1.0 5/19/2015 BSM 47.3 KB
[BSDL] LCMXO3LF-4300E CSFBGA256
1.2 4/5/2016 BSM 47.3 KB
[BSDL] LCMXO3LF-6900E CSFBGA256
1.2 4/5/2016 BSM 51.1 KB
[BSDL] LCMXO3LF-4300C CABGA324
1.0 5/19/2015 BSM 53.3 KB
[BSDL] LCMXO3LF-4300E CSFBGA324
1.2 4/5/2016 BSM 52.7 KB
[BSDL] LCMXO3LF-6900E CSFBGA324
1.2 4/5/2016 BSM 57.3 KB
[BSDL] LCMXO3L-9400C CABGA256
1.1 4/5/2016 BSM 54.5 KB
[BSDL] LCMXO3LF-4300E WLCSP81
1.0 5/19/2015 BSM 34 KB
[BSDL] LCMXO3LF-9400E CABGA256
1.2 10/16/2018 BSM 54.6 KB
[BSDL] LCMXO3LF-640E CSFBGA121
1.2 4/5/2016 BSM 25.4 KB
[BSDL] LCMXO3L-9400C CABGA400
1.1 4/5/2016 BSM 65.8 KB
[BSDL] LCMXO3LF-9400C CABGA400
1.1 4/13/2016 BSM 65.8 KB
[BSDL] LCMXO3LF-9400C CABGA484
1.1 4/13/2016 BSM 70.8 KB
[BSDL] LCMXO3L-9400C CABGA484
1.1 4/5/2016 BSM 70.8 KB
[BSDL] LCMXO3L-9400E CSFBGA256
1.1 4/5/2016 BSM 54.4 KB
[BSDL] LCMXO3LF-9400E CSFBGA256
1.1 4/13/2016 BSM 54.5 KB
[BSDL] LCMXO3LF-9400C CABGA256
1.1 4/13/2016 BSM 54.5 KB
[BSDL] LCMXO3L-6900C CABGA324
1.7 4/5/2016 BSM 57.1 KB
[BSDL] LCMXO3LF-1300E CSFBGA121
1.2 4/5/2016 BSM 25.4 KB
[BSDL] LCMXO3L-4300E CSFBGA324
1.7 4/5/2016 BSM 52.7 KB
[BSDL] LCMXO3LF-1300E CSFBGA256
1.2 4/5/2016 BSM 42.7 KB
[BSDL] LCMXO3L-4300E WLCSP81
1.7 4/5/2016 BSM 34 KB
[BSDL] LCMXO3L-6900C CABGA400
1.7 4/5/2016 BSM 62.4 KB
[BSDL] LCMXO3LF-1300E WLCSP36
1.0 5/19/2015 BSM 18.9 KB
[BSDL] LCMXO3L-6900E CSFBGA256
1.7 4/5/2016 BSM 51.1 KB
[BSDL] LCMXO3L-640E CSFBGA121
1.7 4/5/2016 BSM 25.4 KB
[BSDL] LCMXO3LF-2100C CABGA256
1.0 5/19/2015 BSM 42.7 KB
[BSDL] LCMXO3L-6900C CABGA256
1.6 9/25/2014 BSM 51.2 KB
[BSDL] LCMXO3L-9400E CABGA256
1.2 10/16/2018 BSM 54.6 KB
[BSDL] LCMXO3LF-2100C CABGA324
1.0 5/19/2015 BSM 53.3 KB
[BSDL] LCMXO3LF-1300C CABGA256
1.0 5/19/2015 BSM 42.7 KB
[BSDL] LCMXO3LF-2100E CSFBGA121
1.2 4/5/2016 BSM 33 KB
[BSDL] LCMXO3LF-2100E CSFBGA256
1.2 4/5/2016 BSM 42.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
[IBIS] Lattice MachXO3
2.0 1/6/2016 ZIP 9.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
PCB Routing Example XO3
1.0 10/8/2014 ZIP 2.8 MB

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