CrossLink

Low power FPGA featuring hardened MIPI D-PHY, LVDS, SLVS, subLVDS, & Open LDI bridging

Small footprint, big features – Do you need to bridge, aggregate, or split signals for camers and displays? CrossLink is the most versatile device and has a footprint as small as 6 mm2.

How low can we go – Up to 50% lower power than competition. < 100 mW for many use cases and the first programmable bridging solution with a built-in sleep mode.

Sets the bar in performance – Industry’s fastest MIPI D-PHY bridging solution supporting 4K UHD resolution at speeds up to 12 Gbps. Also supports LVDS, SLVS, subLVDS, and OpenLDI (OLDI).

Features

  • Two 4-lane MIPI D-PHY transceivers at 6 Gbps per PHY
  • 15 programmable source synchronous I/O pairs for camera and display interfacing
  • Available in amazingly small 2.46 mm x 2.46 mm WLCSP packages and BGA packages with 0.4 mm, 0.5 mm and 0.65 mm pitch
  • Flexible device configuration with OTP non-volatile configuration memory and I2C/SPI programming
  • More than 5900 LUTs with up to 81 I/O pins
  • Soft IP available for multiple bridging solutions here

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Family Table

CrossLink Device Selection Guide

Features LIF-MD6000-36 LIF-MD6000-64 LIF-MD6000-81 LIA-MD6000-81 LIF-MD6000-80 LIA-MD6000-80 LIF-MD6000-80 LIA-MD6000-80
LUTs 5936 5936 5936 5936 5936 5936 5936 5936
Embedded Memory (kbits) 180 180 180 180 180 180 180 180
Distributed RAM (kbits) 47 47 47 47 47 47 47 47
GPLL 1 1 1 1 1 1 1 1
D-PHY PLL 1 2 2 2 2 2 2 2
Embedded I2C Blocks 2 2 2 2 2 2 2 2
Embedded RX/TX MIPI D-PHY 1 (4 Data + 1 Clock) 2 (8 Data + 2 Clock) 2 (8 Data + 2 Clock) 2 (8 Data + 2 Clock) 2 (8 Data + 2 Clock) 2 (8 Data + 2 Clock) 2 (8 Data + 2 Clock) 2 (8 Data + 2 Clock)
48 MHz Oscillator 1 1 1 1 1 1 1 1
10 KHz Oscillator 1 1 1 1 1 1 1 1
NVCM Yes Yes Yes Yes Yes Yes Yes Yes
Dual Boot1 Yes Yes Yes Yes Yes Yes Yes Yes
Power Management Unit Yes Yes Yes Yes Yes Yes Yes Yes
Low Power Sleep Mode Yes Yes Yes Yes Yes Yes Yes Yes
Typical Operational Power 5 mW - 135 mW 5 mW - 135 mW 5 mW - 135 mW 5 mW - 135 mW 5 mW - 135 mW 5 mW - 135 mW 5 mW - 135 mW 5 mW - 135 mW
Footprint 2.5 mm x 2.5 mm 3.5 mm x 3.5 mm 4.5 mm x 4.5 mm 4.5 mm x 4.5 mm 6.5 mm x 6.5 mm 6.5 mm x 6.5 mm 7.0 mm x 7.0 mm 7.0 mm x 7.0 mm
Package Pitch 0.4 mm 0.4 mm 0.5 mm 0.5 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm
Programmable I/O 17 29 37 37 37 37 37 37
Automotive Qualified No No No Yes No Yes No Yes

1. Dual Boot supported with external boot Flash

Example Solutions

ADAS Application

  • Bridge multiple CSI-2 image sensors into one single MIPI CSI-2 output for 360 degree camera application.
  • Camera input support from a variety of interfaces like CSI-2, LVDS, Sub-LVDS and LVCMOS.
  • Multiple camera interfaces supported to bridge to the Application Processor.
  • Stitch data together into larger horizontal video frame.

Multi CSI-2 Image Sensor Interface Bridging Solutions

  • Bridge multiple CSI-2 image sensors into one MIPI CSI-2 output
  • Configure multiple image sensors with same I2C slave address from one I2C master
  • Trigger and synchronize image sensors with GPIO control
  • Stitch data together into larger horizontal video frame
  • Arbitrate data from image sensors and append unique virtual channel numbers

Click here for more information

Multi MIPI DSI Display Bridging

  • Drive multiple MIPI DSI displays or display requiring two MIPI DSI interfaces
  • Replicate video to both displays or reduce the bandwidth by half on output over two PHYs
  • Control peripheral functions and power sequencing of displays with additional GPIO

Click here for more information

Display Interface Conversion Bridging

  • Convert to/from MIPI DSI, OpenLDI/LVDS, and RGB/CMOS
  • Support all data types and number of lanes
  • Support additional functions such as display and peripheral initialization, control and sequencing
  • Crop & scale video data to match special formatting needs

Click here for more information

Camera Interface Conversion Bridging

  • Convert to/from MIPI CSI-2, SubLVDS, LVDS, CMOS, HiSPi and other image sensor interfaces
  • Control frame and line readout controls for slave driven image sensors
  • Convert I2C to SPI for image sensor and peripheral control
  • Crop & scale video data to match special formatting needs

Click here for more information

Video

CrossLink Demo 3 ThumbnailExpand Image

Introduction to CrossLink

Learn how CrossLink can solve interfacing problems including implementing multi CSI-2 bridges for mixing, merging, arbitrating, converting multiple image sensor interfaces to a single applications processor.

MIPI ThumbnailExpand Image

CrossLink IP Cores for Mobile Influenced Markets

Check out how CrossLink's collection of IP cores helps you solve design challenges with MIPI interface adoption.
Using Lattice CrossLink FPGA for 360 Surround View ApplicationsExpand Image

Using Lattice CrossLink FPGA for 360 Surround View Applications

Taking a simple camera and converting it regular image into a 360 surround view doesn't have to be difficult. Learn how our CrossLink FPGA can help.
Adding CrossLink IP Using Clarity DesignerExpand Image

Adding CrossLink IP Using Clarity Designer

Check out how easy it is to add CrossLink IPs to your designs.
Debug Your Project with Reveal Expand Image

Debug Your Project with Reveal

This video shows you how to add Reveal to debug a project.

Awards

Embedded World Awards 2017

Hardware Product Nominee

EEPW Magazine (China) 2016 Editor's Choice Award

Best FPGA Product

Design Resources

Development Kits & Boards

Our development boards & kits help streamline your design process

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Application Notes

Learn how to get the most from our line-up of FPGAs / development boards

Software

Complete Design Flows, High Ease of Use

Documentation

To subscribe, or modify your subscription, to Document Notifications please login to your Lattice account

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
CrossLink Family Data Sheet
FPGA-DS-02007 1.6 11/19/2019
CrossLink Automotive Family Data Sheet
FPGA-DS-02013 1.6 11/19/2019
Power Management and Calculation for CrossLink Devices
FPGA-TN-02018 1.1 10/25/2018
Advanced CrossLink I2C Hardened IP Reference Guide
FPGA-TN-02020 1.0 8/22/2016
CrossLink Memory Usage Guide
FPGA-TN-02017 1.0 8/22/2016
CrossLink High-Speed I/O MIPI D-PHY and DDR Interfaces
FPGA-TN-02012 1.1 8/22/2016
CrossLink Hardware Checklist
FPGA-TN-02013 1.2 1/22/2019
CrossLink I2C Hardened IP Usage Guide
FPGA-TN-02019 1.0 8/22/2016
CrossLink sysCLOCK PLL/DLL Design and Usage Guide
FPGA-TN-02015 1.3 1/7/2019
CrossLink sysI/O Usage Guide
FPGA-TN-02016 1.3 4/6/2020
CrossLink Programming and Configuration Usage Guide
FPGA-TN-02014 1.2 2/15/2018
CrossLink LIF-MD6000 Pinout
1.5 7/12/2019
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019
Package Diagrams
FPGA-DS-02053 5.8 6/24/2020
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 4.1 5/20/2019
TITLE NUMBER VERSION DATE FORMAT SIZE
CrossLink Family Data Sheet
FPGA-DS-02007 1.6 11/19/2019
CrossLink Automotive Family Data Sheet
FPGA-DS-02013 1.6 11/19/2019
TITLE NUMBER VERSION DATE FORMAT SIZE
Power Management and Calculation for CrossLink Devices
FPGA-TN-02018 1.1 10/25/2018
Advanced CrossLink I2C Hardened IP Reference Guide
FPGA-TN-02020 1.0 8/22/2016
CrossLink Memory Usage Guide
FPGA-TN-02017 1.0 8/22/2016
CrossLink High-Speed I/O MIPI D-PHY and DDR Interfaces
FPGA-TN-02012 1.1 8/22/2016
CrossLink Hardware Checklist
FPGA-TN-02013 1.2 1/22/2019
CrossLink I2C Hardened IP Usage Guide
FPGA-TN-02019 1.0 8/22/2016
CrossLink sysCLOCK PLL/DLL Design and Usage Guide
FPGA-TN-02015 1.3 1/7/2019
CrossLink sysI/O Usage Guide
FPGA-TN-02016 1.3 4/6/2020
CrossLink Programming and Configuration Usage Guide
FPGA-TN-02014 1.2 2/15/2018
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 4.1 5/20/2019
TITLE NUMBER VERSION DATE FORMAT SIZE
CrossLink LIF-MD6000 Pinout
1.5 7/12/2019
Package Diagrams
FPGA-DS-02053 5.8 6/24/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
PCN05A-18 Crosslink Data Sheet Vccaux
7/19/2018
PCN02A-18 Crosslink Ind Data Sheet
PCN02A-18 A 3/16/2018
Alternate Qualified Foundry Mask Sets for selected ECP5 and Crosslink devices
PCN11A-19 12/12/2019
PCN10A-19 Crosslink Datasheet Update
PCN10A-19 1.0 11/20/2019
TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
6.8 7/16/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
CrossLink Product Brochure
I0254 4.0 9/30/2019
Product Selector Guide
I0211 26.0 7/9/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
SWG_UWG36
Rev D 9/14/2018
MG81_Crosslink
Rev D 4/20/2020
UMG64_Crosslink
Rev C 4/15/2020
MG80 Crosslink
Rev. E 6/17/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
Developing Vision Systems with Dissimilar Sensors: Integrating Image, Radar, and Time-of-Flight Sensors in Embedded Applications
WP-0020 1.0 9/11/2019
Video Bridging Solution Promises New Level of Design Flexibility and Innovation
WP0005 1.1 11/10/2017
New Use Cases Highlight CrossLinks Broad Applicability
WP0009 1.1 11/10/2017
Supporting MIPI in Embedded Vision System Designs Using Lattice CrossLink FPGAs
WP0023 1.0 4/17/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
CrossLink Infographic
8/6/2019
TITLE NUMBER VERSION DATE FORMAT SIZE
Delphi Thermal Model
1.0 6/12/2018
TITLE NUMBER VERSION DATE FORMAT SIZE
[IBIS] LIF-MD
2.2 1/22/2020


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