Lattice Blog

Form Follows Function – Selecting the Best Lattice FPGA

Form Follows Function – Selecting the Best Lattice FPGA

Posted 04/03/2018 by Gordon Hands

You may be asking yourself, “What does a nineteenth century architect have to do with FPGAs?” A key decision facing many system architects is which FPGA families to use in their next project. Lattice currently offers four classes of FPGAs: iCE, ECP, Mach and CrossLink. It is often tempting to think of FPGAs as just a blank canvas, ready to be filled with digital logic.

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Solving the Challenges around In-Field Upgrades

Solving the Challenges around In-Field Upgrades

Posted 03/01/2018 by Joel Coplen

A key benefit of programmable logic devices, such as FPGAs and CPLDs, is their programmability. These devices are typically deployed with a unique design intended to address application-specific problems. And because of these problems, many embedded systems that deploy programmable products benefit greatly from the ability to update their design and configuration after manufacturing. An upgrade feature is useful for multiple end-applications.

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Solving Embedded Challenges

Solving the Embedded Challenge of Too Many Signals and Interfaces

Posted 11/07/2017 by Joel Coplen

Building designs around state of the art microcontrollers and embedded processors brings along a specific challenge: not enough I/Os and interfaces. Today’s embedded systems have more real-time data and control requirements than ever.

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CES - 2017 trends

CES 2017 Trends

Posted 01/17/2017 by Elena Champion

Celebrating its 50th birthday, CES 2017 did not disappoint. Hundreds of thousands of people gathered in Las Vegas to get a first look at the latest technology for the upcoming year. During the 4 days, the biggest names in consumer electronics and startups alike wowed us with products and technologies that promise to make our lives easier and more efficient. Here are some of the trends we saw at the event and how we can support them.

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Simplify board design and debug with Control PLDs

Simplify board design and debug with Control PLDs

Posted 05/10/2016 by Shyam Chandra

Today’s designers face a major challenge: How do I pack more functionality into a board, and do it faster and cheaper? The go-to approach to solving this problem is to implement data path or payload functions using highly integrated ASICs and SoCs. However, the design is not complete by simply connecting all the large devices together.

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